An example illustrating data transmission between high-speed components within a single semiconductor device, or between two devices on a printed circuit board, is represented by the system 1 shown in FIG. 1. In FIG. 1, a transmitter 2 (e.g., a microprocessor) sends data over one or more transmission channels 4x (e.g., conductive traces “on-chip” in a semiconductor device or on a printed circuit board) to a receiver 6 (e.g., another microprocessor or memory). As a group, such transmission channels 4x are often referred to as a “data bus,” which allows one or more data signals to be transmitted from one device to another.
As discussed in U.S. patent application Ser. No. 11/873,779, filed Oct. 17, 2007, a data bus is susceptible to cross talk, simultaneous switching noise, intersymbol interference, and draws power based on the state of the data and/or frequency of data transition. One way to reduce these adverse effects and to prevent unnecessary power consumption is to encode the data. One specific form of data encoding that can be used is Data Bus Inversion (DBI).
Implementation of DBI includes encoding circuitry at the transmitter that assesses the relationship between data bits to be transmitted across a data bus and then decides (based on a particular DBI algorithm) if it would be advantageous to invert some or all of the data bits prior to transmission. If the data bits are inverted, an additional signal, referred to as a DBI bit, is also set at the encoding circuitry to indicate that the data bits are inverted. Typically, as shown in FIG. 1, an extra channel 7 is then needed so that the DBI bit may be transmitted in parallel with the data bits to inform the receiving circuitry which groups of data bits have been inverted. The receiver 6 then uses the DBI bit in conjunction with decoding circuitry to return the incoming group of data bits to their original state.
One specific DBI algorithm, illustrated in FIGS. 2A and 2B, is referred to as the “minimum transitions” algorithm. While there may be variations of this technique, in general the minimum transitions algorithm begins by computing how many bits will transition during an upcoming cycle. When more than a certain number of transitions are determined, encoding circuitry inverts the entire bus, sets the DBI bit to a specified state (high or low depending on the implementation), and drives the inverted data bits and the DBI bit in parallel across the transmission channels 4x and 7, where the DBI bit is used to decode (i.e., de-invert) the inverted data bits prior to use in the receiver 6.
The minimum transitions technique can be implemented in one embodiment using the encoding circuitry 8 of FIG. 2A. Because this technique is discussed at length in the above-mentioned '779 application, it is explained only briefly here. As shown, two successive bytes of data, Din(0:7) (the current byte) and Dout(0:7) (the previous byte), are compared at exclusive OR (XOR) gates 3 on a bit-by-bit basis to determine which bits in the data signals are changing. After this XOR comparison, and in accordance with DBI algorithm 9, the XOR results are summed, and a determination is made as to whether the sum is greater than four (i.e., whether there are at least five transitions from the previous byte of data to the current byte). If the sum is greater than four, the current byte is inverted before it is transmitted, and the DBI bit 7 is transmitted as ‘1.’ Alternatively, if the sum is four or less (i.e., there are no more than four transitions from one byte to the next), the data is transmitted unaltered, and the DBI bit 7 is transmitted as ‘0.’
FIG. 2B shows how the minimum transitions DBI algorithm 9 works to reduce the number of transitions in a random sequence of bytes, such that no more than four transitions are permitted between successive bytes. Again, this reduction of transitions reduces dynamic current draw at the transmitter 2 and improves the reliability of data transfer by reducing cross talk and simultaneous switching noise.
Other DBI algorithms exists, such as are discussed in the above-mentioned '779 application, and thus one skilled in the art will realize that the DBI technique illustrated in FIGS. 2A and 2B is merely exemplary. For example, some DBI techniques may use more than one DBI bit to provide even finer control over which bits of data will be inverted, as mentioned in the '779 application.
The inventor believes that advances in system integration are making the implementation of DBI, and other data encoding algorithms, more attractive. At the same time, the use of such algorithms is becoming more important as systems shrink and as it becomes increasingly important that such systems reduce their power consumption and operate at high speeds.